1. Field of the Invention
This invention pertains to the general field of frequency detectors and in particular pertains to a circuit which receives two input frequencies and generates a pump-up/pump-down signal for the control of a phase locked loop or a frequency locked loop. The circuit can be used in the construction of such loops where it is desirable for the lock to be independent of the phase relationship between two signals.
2. Description of the Prior Art
The initial acquisition of a phase locked loop when used for timing or carrier extraction is a significant practical problem, since the narrow bandwidth generally required for jitter requirements severely restricts the pull-in range. In the prior art many methods have been used to effect the acquisition. These methods are summarized in an article entitled "Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery", David G. Messerschmitt, IEEE Transactions on Communications, Vol. Com-27, No. 9, September 1979. This article also discusses two specific frequency detectors, each of which is applicable to both timing and carrier recovery. The first is of the quadricorrelator type using classical linear techniques. Such a frequency detector is also discussed in U.S. Pat. No. 4,308,505. The second is a rotational frequency detector implemented with digital circuitry. Both of these frequency detectors differ from that disclosed in the present invention. The present invention presents a digital circuit which does not use a quadrature scheme. A number of recent patents, including U.S. Pat. No. 4,378,509, disclose circuits which lock on both phase and frequency. These patents differ from the present invention which does not lock on phase. Other prior art patents disclose frequency detectors using classical analog discrimination schemes or circuits which compare the output of two frequency counters, both types of frequency detectors differ from that of the present invention.